Technologies

Architecture

For an embedded electronic hardware system, processing nodes are connected by communication paths. This can be referred to the topology. The topology defines the foundation of the communication performance as well as the fault tolerance and fall-back possibilities.

For the embedded software the overall architecture is the deployment of processing elements on the HW processing nodes. Within a processing node we need to define the multi core architecture for optimum performance and robustness.

Communication

Below is a non-exhaustive list of communication technologies that can be used.

Networks

100BASE-T1

1000BASE-T1

SpaceWire

Field Buses

EtherCAT

10BASE-T1S

CAN / CAN-FD

LIN

MIL-STD-1553B

Legacy Links

UART

USB

100BASE-TX

PCB links

I2C

SPI

xMII

XFI

MDIO

PCIe

Camera links

GMSL2

MIPI

Processing

The processing nodes comprises a multitude of blocks to be deployed in dependable computing context.

CPU cores

ARM

RISC-V

x86

TriCore

AI Cores

GPU

NNP

Accelerators

Interface accelerators

Video accelerators

Safety and Security

Error Detection and Correction

Security

Safety supervisors